SST SST

Company Profile

Silicon Storage Technology, Inc. was founded in 1989 and has become a leading provider of a diversified range of memory and non-memory products for high volume applications in the digital consumer, networking, wireless communications and Internet computing markets. The company has around 580 employees worldwide and its revenue for fiscal 2008 was approximately US$315.5 Million. (WW No.1 Shipment for low density NOR) 

Leveraging its proprietary, patented SuperFlash® technology, SST provides nonvolatile memory solutions with product families that include various densities of high functionality flash memory components and flash mass storage products. SST also offers its SuperFlash technology for embedded applications through its broad network of world-class manufacturing partners and technology licensees, including TSMC, which offers it under its trademark Emb-FLASH. SST’s non-memory products include NAND controller-based products, smart card ICs and modules, flash microcontrollers and radio frequency ICs and modules. 

Product Features

The SuperFlash® technology and memory cell have a number of important advantages for designing and manufacturing flash EEPROMs, or embedding SuperFlash memory in logic devices, when compared with the thin oxide stacked gate or two transistor approaches. 

The SuperFlash® technology

The SST SuperFlash® technology typically uses a simpler process with fewer masking layers, compared to other flash EEPROM approaches. The fewer masking steps significantly reduces the cost of manufacturing a wafer. Reliability is improved by reducing the latent defect density, i.e., fewer layers are exposed to possible defect causing mechanisms.

SuperFlash® = Superior Flash Memory

The SST split-gate memory cell is comparable in size to the single transistor stacked gate cell (for a given level of technology), yet provides the performance and reliability benefits of the traditional two transistor byte alterable E2PROM cell. By design, the SST split-gate memory cell eliminates the stacked gate issue of "overerase", by isolating each memory cell from the bit line. "Erase disturb" cannot occur because all bytes are simultaneously erased in the same page and each page is completely isolated from every other page during any high voltage operation.

Advancement of SuperFlash Cell Reduces Cell Size by 40%

If you wish to see more detailed information about SST products, please visit SST web site.